hvmloader: don't hard-code IO-APIC parameters

The IO-APIC address has variable bits determined by the PCI-to-ISA
bridge (albeit for now we refrain from actually evaluating them, as
there's still implicit rather than explicit agreement on the IO-APIC
base address between qemu and the hypervisor), and the IO-APIC version
should be read from the IO-APIC.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
This commit is contained in:
Jan Beulich committed 2016-08-04 10:08:48 +02:00
1 parent 2fd44a3edc
commit 8ef5b6e11b
5 files changed
+22 -9

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+1 -1
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@@ -137,7 +137,7 @@ static struct acpi_20_madt *construct_madt(struct acpi_info *info)
io_apic->type = ACPI_IO_APIC;
io_apic->length = sizeof(*io_apic);
io_apic->ioapic_id = IOAPIC_ID;
io_apic->ioapic_addr = IOAPIC_BASE_ADDRESS;
io_apic->ioapic_addr = ioapic_base_address;
lapic = (struct acpi_20_madt_lapic *)(io_apic + 1);
info->nr_cpus = hvm_info->nr_vcpus;
+3 -2
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@@ -42,9 +42,10 @@ extern struct bios_config ovmf_config;
#define PAGE_SHIFT 12
#define PAGE_SIZE (1ul << PAGE_SHIFT)
#define IOAPIC_BASE_ADDRESS 0xfec00000
extern uint32_t ioapic_base_address;
extern uint8_t ioapic_version;
#define IOAPIC_ID 0x01
#define IOAPIC_VERSION 0x11
#define LAPIC_BASE_ADDRESS 0xfee00000
#define LAPIC_ID(vcpu_id) ((vcpu_id) * 2)
+12
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@@ -108,6 +108,9 @@ asm (
unsigned long scratch_start = SCRATCH_PHYSICAL_ADDRESS;
uint32_t ioapic_base_address = 0xfec00000;
uint8_t ioapic_version;
static void init_hypercalls(void)
{
uint32_t eax, ebx, ecx, edx;
@@ -185,6 +188,15 @@ static void init_vm86_tss(void)
static void apic_setup(void)
{
/*
* This would the The Right Thing To Do (tm), if only qemu negotiated
* with Xen where the IO-APIC actually sits (which is currently hard
* coded in Xen and can't be controlled externally). Uncomment this code
* once that changed.
ioapic_base_address |= (pci_readb(PCI_ISA_DEVFN, 0x80) & 0x3f) << 10;
*/
ioapic_version = ioapic_read(0x01) & 0xff;
/* Set the IOAPIC ID to the static value used in the MP/ACPI tables. */
ioapic_write(0x00, IOAPIC_ID);
+2 -2
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@@ -227,9 +227,9 @@ static void fill_mp_ioapic_entry(struct mp_ioapic_entry *mpie)
{
mpie->type = ENTRY_TYPE_IOAPIC;
mpie->ioapic_id = IOAPIC_ID;
mpie->ioapic_version = IOAPIC_VERSION;
mpie->ioapic_version = ioapic_version;
mpie->ioapic_flags = 1; /* enabled */
mpie->ioapic_addr = IOAPIC_BASE_ADDRESS;
mpie->ioapic_addr = ioapic_base_address;
}
+4 -4
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@@ -490,14 +490,14 @@ void *scratch_alloc(uint32_t size, uint32_t align)
uint32_t ioapic_read(uint32_t reg)
{
*(volatile uint32_t *)(IOAPIC_BASE_ADDRESS + 0x00) = reg;
return *(volatile uint32_t *)(IOAPIC_BASE_ADDRESS + 0x10);
*(volatile uint32_t *)(ioapic_base_address + 0x00) = reg;
return *(volatile uint32_t *)(ioapic_base_address + 0x10);
}
void ioapic_write(uint32_t reg, uint32_t val)
{
*(volatile uint32_t *)(IOAPIC_BASE_ADDRESS + 0x00) = reg;
*(volatile uint32_t *)(IOAPIC_BASE_ADDRESS + 0x10) = val;
*(volatile uint32_t *)(ioapic_base_address + 0x00) = reg;
*(volatile uint32_t *)(ioapic_base_address + 0x10) = val;
}
uint32_t lapic_read(uint32_t reg)
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