ns16550: add support for ASIX AX99100 PCIe Multi-I/O controller

Add a PCI device table entry and matching parameter for the ASIX
AX99100 PCIe to Multi-I/O controller [125b:9910]. Each port on the
chip is a standalone PCI function, with UART registers on its I/O
BAR0.

Signed-off-by: Jiaqing Zhao <Zhao.Jiaqing@amd.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Acked-by: Roger Pau Monné <roger.pau@citrix.com>
This commit is contained in:
Jiaqing Zhao authored and Jan Beulich committed 2026-07-02 08:46:12 +02:00
1 parent 6029b68332
commit d1f70074a5
2 files changed
+17

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+15
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@@ -97,6 +97,7 @@ struct ns16550_config {
param_exar_xr17v358,
param_intel_lpss,
param_wch_ch382,
param_asix,
} param;
};
@@ -900,6 +901,14 @@ static const struct ns16550_config_param __initconst uart_param[] = {
.bar0 = true,
.max_ports = 2,
},
[param_asix] = {
.base_baud = 115200,
.reg_width = 1,
.fifo_size = 256,
.lsr_mask = UART_LSR_THRE,
.bar0 = true,
.max_ports = 1,
},
};
static const struct ns16550_config __initconst uart_config[] =
@@ -1240,6 +1249,12 @@ static const struct ns16550_config __initconst uart_config[] =
.dev_id = 0x3253,
.param = param_wch_ch382
},
/* ASIX AX99100 PCIe to Multi I/O Controller */
{
.vendor_id = PCI_VENDOR_ID_ASIX,
.dev_id = 0x9910,
.param = param_asix
},
};
static int __init
+2
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@@ -5,6 +5,8 @@
#define PCI_VENDOR_ID_NVIDIA 0x10de
#define PCI_VENDOR_ID_ASIX 0x125b
#define PCI_VENDOR_ID_PERICOM 0x12d8
#define PCI_VENDOR_ID_EXAR 0x13a8
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