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ns16550: add support for ASIX AX99100 PCIe Multi-I/O controller
Add a PCI device table entry and matching parameter for the ASIX AX99100 PCIe to Multi-I/O controller [125b:9910]. Each port on the chip is a standalone PCI function, with UART registers on its I/O BAR0. Signed-off-by: Jiaqing Zhao <Zhao.Jiaqing@amd.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> Acked-by: Roger Pau Monné <roger.pau@citrix.com>
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@@ -97,6 +97,7 @@ struct ns16550_config {
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param_exar_xr17v358,
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param_intel_lpss,
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param_wch_ch382,
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param_asix,
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} param;
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};
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@@ -900,6 +901,14 @@ static const struct ns16550_config_param __initconst uart_param[] = {
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.bar0 = true,
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.max_ports = 2,
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},
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[param_asix] = {
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.base_baud = 115200,
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.reg_width = 1,
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.fifo_size = 256,
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.lsr_mask = UART_LSR_THRE,
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.bar0 = true,
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.max_ports = 1,
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},
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};
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static const struct ns16550_config __initconst uart_config[] =
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@@ -1240,6 +1249,12 @@ static const struct ns16550_config __initconst uart_config[] =
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.dev_id = 0x3253,
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.param = param_wch_ch382
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},
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/* ASIX AX99100 PCIe to Multi I/O Controller */
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{
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.vendor_id = PCI_VENDOR_ID_ASIX,
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.dev_id = 0x9910,
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.param = param_asix
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},
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};
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static int __init
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@@ -5,6 +5,8 @@
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#define PCI_VENDOR_ID_NVIDIA 0x10de
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#define PCI_VENDOR_ID_ASIX 0x125b
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#define PCI_VENDOR_ID_PERICOM 0x12d8
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#define PCI_VENDOR_ID_EXAR 0x13a8
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