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x86emul: add memory operand low bits checks for ENQCMD{,S}
Already ISE rev 044 added text to this effect; rev 045 further dropped
leftover earlier text indicating the contrary:
- ENQCMD requires the low 32 bits of the memory operand to be clear,
- ENDCMDS requires bits 20...30 of the memory operand to be clear.
Fixes: d273859687 ("x86emul: support ENQCMD insns")
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
This commit is contained in:
1 parent
c16a9eda77
commit
d620c66bdb
1 file changed
+3
-1
@@ -10499,6 +10499,7 @@ x86_emulate(
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goto done;
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if ( vex.pfx == vex_f2 ) /* enqcmd */
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{
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generate_exception_if(mmvalp->data32[0], EXC_GP, 0);
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fail_if(!ops->read_msr);
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if ( (rc = ops->read_msr(MSR_PASID, &msr_val,
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ctxt)) != X86EMUL_OKAY )
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@@ -10506,7 +10507,8 @@ x86_emulate(
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generate_exception_if(!(msr_val & PASID_VALID), EXC_GP, 0);
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mmvalp->data32[0] = MASK_EXTR(msr_val, PASID_PASID_MASK);
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}
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mmvalp->data32[0] &= ~0x7ff00000;
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else
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generate_exception_if(mmvalp->data32[0] & 0x7ff00000, EXC_GP, 0);
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state->blk = blk_enqcmd;
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if ( (rc = ops->blk(x86_seg_es, src.val, mmvalp, 64, &_regs.eflags,
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state, ctxt)) != X86EMUL_OKAY )
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