Commit Graph
27326 Commits
Author SHA1 Message Date
Boris Ostrovsky 330c2e4e94 Intel/VPMU: Add support for full-width PMC writes
A recent Linux commit (069e0c3c405814778c7475d95b9fff5318f39834) added
support for full-width PMC writes to performance counter registers,
making these registers default for perf. Since current Xen VPMU does
not support these new MSRs perf will fail to initialise in guests.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Dietmar Hahn <dietmar.hahn@ts.fujitsu.com>
Acked-by: Keir Faser <keir@xen.org>
2013-08-07 09:51:02 +02:00
Andrew Cooper 66450c1d1a xen/conring: Write to console ring even if console lock is busted
console_lock_busted gets set when an NMI/MCE/Double Fault handler decides to
bring Xen down in an emergency.  conring_puts() cannot block and does
not have problematic interactions with the console_lock.

Therefore, choosing to not put the string into the console ring simply means
that the kexec environment cant find any panic() message caused by an IST
interrupt, which is unhelpful for debugging purposes.

In the case that two pcpus fight with console_force_unlock(), having slightly
garbled strings in the console ring is far more useful than having nothing at
all.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Matt Wilson <msw@amazon.com>
Acked-by: Keir Fraser <keir@xen.org>
2013-08-06 17:45:00 +02:00
Andrew Cooper cc90bf1894 xen/conring: Clean up writing to the console ring
Refactor putchar_console_ring() to conring_puts().  This allows for
consistency with {sercon,vga}_puts(), prevents needless recalculation of
the conring consumer index, and slight cleanup at the two callsites.

There is no functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Matt Wilson <msw@amazon.com>
Acked-by: Keir Fraser <keir@xen.org>
2013-08-06 17:44:31 +02:00
Yang Zhang e1ab5c77b4 Nested VMX: Flush TLBs and Caches if paging mode changed
According to SDM, if paging mode is changed, then whole TLBs and caches will
be flushed. This is missed in nested handle logic. Also this fixed the issue
that 64 bits windows cannot boot up on top of L1 kvm.

Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
Acked-by: Keir Fraser <keir@xen.org>
2013-08-06 17:22:35 +02:00
Jan Beulich c58d9f2f48 x86: refine FPU selector handling code for XSAVEOPT
Some extra tweaks are necessary to deal with the situation of XSAVEOPT
not writing the FPU portion of the save image (due to it detecting that
the register state did not get modified since the last XRSTOR).

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Tested-by: Ben Guthro <ben.guthro@gmail.com>
Acked-by: Keir Fraser <keir@xen.org>
2013-08-05 18:42:37 +02:00
Jan Beulich b0e55bd497 fix off-by-one mistakes in vm_alloc()
Also add another pair of assertions to catch eventual further cases of
incorrect accounting, and remove the temporary debuggin messages again
which commit 68caac7f ("x86: don't use destroy_xen_mappings() for
vunmap()") added.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
2013-08-05 18:40:23 +02:00
Ian Jackson db3320281d QEMU_TAG update 2013-08-05 16:53:08 +01:00
Paul Durrant 066e134fb3 Add vendor_device parameter for HVM guests
The parameter determines which, if any, xen-pvdevice is specified on the
QEMU command line. The default value is 'none' which means no argument will
be passed. A value of 'xenserver' specifies a xen-pvdevice with device-id
0xc000 (the initial value in the xenserver namespace - see
docs/misc/pci-device-reservations.txt).

Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
[ ijc -- s/BUILD_INFO/BUILDINFO for consistency in LIBXL_HAVE define ]
2013-08-05 10:25:21 +01:00
Julien Grall c10b492064 xen/arm: Use define instead of hardcoded value in debug-pl011
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Reviewed-by: Tim Deegan <tim@xen.org>
2013-08-05 10:23:15 +01:00
Julien Grall 33440c3f60 pl011: Move registers' definition in a separate file
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Reviewed-by: Tim Deegan <tim@xen.org>
2013-08-05 10:23:15 +01:00
Julien Grall 56b20c4f5d pl011: Use ioreadl/iowritel
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2013-08-05 10:21:57 +01:00
Andrew Cooper 8f55cb0e36 scmversion: 'Improve' svn interaction.
Xen has never been in an svn tree, and the current code will unconditionally
create a .svn directory when run from a tarball.

Therefore, simply discard the svn support.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
2013-08-02 17:09:26 +01:00
Andrew Cooper d7dacecaa3 docs: Correct docs for extra_guest_irqs command line option
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Ian Campbell <Ian.Campbell@citrix.com>
2013-08-02 16:30:48 +01:00
rwxybh 666893cd73 libxl: Fix function libxl__domain_resume_device_model
Add a break line in function libxl__domain_resume_device_model

Signed-off-by: Bingheng Yan <rwxybh@126.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2013-08-02 16:29:08 +01:00
Ian Campbell 173b9f1958 xen: arm: handle traps of conditional instructions.
This means handling the HSR.ccvalid field as well as correctly processing the
Thumb If-Then state block in the CPSR correctly which is rather tricky. KVM
provided a useful reference for all this.

I suspect we aren't actually hitting these paths very often since the sorts of
traps we take will not often be conditional so my limited testing may not
actually be exercising these paths very much.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.linaro.org>
2013-08-02 16:28:15 +01:00
Ian Campbell e7cf6219b4 xen: arm: do not pretend to be a Cortex-A15 when running 32-bit guests
It is definitely wrong to do this when running on non-Cortex-A15 32-bit
hardware but even when running on 64-bit hardware it's not really necessary
and may cause more harm than good if the underlying processor is not all that
similar to an A15.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
2013-08-02 15:49:27 +01:00
Vadim A. Misbakh-Soloviov 8f34f51567 flask: use DESTDIR directly in install target rules
30.07.2013 13:51, Ian Campbell wrote:
> I think it would be a bit less surprising for drive by patchers etc to
> remove the DESTDIR from POLICY_LOADPATH and add it to the install
> target, which is the usual way to do things. Up to you/Vadim though.

Signed-off-by: Vadim A. Misbakh-Soloviov <mva@mva.name>
Acked-by: Daniel De Graaf <dgdegra@tycho.nsa.gov>
2013-08-02 15:43:15 +01:00
Vadim A. Misbakh-Soloviov 4328e21d5d tools: build flask-tools and flask policy only if flask enabled
Signed-off-by: Vadim A. Misbakh-Soloviov <mva@mva.name>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2013-08-02 15:42:59 +01:00
Vadim A. Misbakh-Soloviov 8bff3edead flask: avoid installing policy file as '/boot'
Signed-off-by: Vadim A. Misbakh-Soloviov <mva@mva.name>
Acked-by: Daniel De Graaf <dgdegra@tycho.nsa.gov>
2013-08-02 15:42:37 +01:00
Samuel Thibault 10f6b65545 stubdom: Fix stubdom undeclared function build warnings
This includes a few headers to fix some missing function declarations.

../grub-upstream/stage2/builtins.c:1728:3: warning: implicit declaration of function ‘do_exit’ [-Wimplicit-function-declaration]
stubdom/include/xen/libelf/libelf.h:453:5: warning: implicit declaration of function ‘memcpy’ [-Wimplicit-function-declaration]

Reported-by: IAN DELANEY <della5@iinet.com.au>
Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2013-08-02 15:37:26 +01:00
Julien Grall 6072b7c808 xen/arm: Fix guest secondaries CPU boot after bcac10f
The commit bcac10f "xen: arm: support building a 64-bit dom0 domain" breaks
secondary cpus boot for all the guest. Linux requires CPUs to boot on SVC mode.

Divide PSR_GUEST_INIT in 2 distinct defines: one for 32 bit, the other for 64
bits guests.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2013-07-30 09:36:18 +01:00
Ian Campbell a521eb1fb9 Merge branch 'staging' of ssh://xenbits.xen.org/home/xen/git/xen into staging 2013-07-29 16:56:02 +01:00
Ian Campbell 7d413e38c7 xen: arm: Handle SMC from 64-bit guests
Similarly to arm32 guests handle it by injecting an undefined instruction
trap.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
2013-07-29 16:54:51 +01:00
Ian Campbell c6fd2ed3f6 xen: arm: document HCR bits.
I was mostly interested in commenting the RW bit which is Register Width and
not Read/Write as a reader might initially expect. Thought I might as well do
the others...

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
2013-07-29 16:54:51 +01:00
Ian Campbell 5c9c464718 xen: arm: align some comments
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-07-29 16:54:51 +01:00
Ian Campbell 1d9866b723 xen: arm: handle 64-bit system register access traps.
Wire up the vtimer handling to it.

Use a simplified version of the 32-bit cp-register macros to have convenient
decoding of HSR register values. (simplified because we don't need them for
passing to the assembler on 64-bit)

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-07-29 16:54:51 +01:00
Ian Campbell b98070f121 xen: arm: handle hypercalls from 64-bit guests
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-07-29 16:54:51 +01:00
Ian Campbell b068e6a63c xen: arm: handle traps from 64-bit guests
While there observe that we weren't ever restoring the outer stack frame, even
for 32-bit guests when running a 64-bit hypervisor! The outer stack frame
"only" contains most of the SPSR registers for 32-bit...

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
2013-07-29 16:54:50 +01:00
Ian Campbell 1ac24d584d xen: arm: refactor 64-bit return from trap path
Refactor exit path to use a single "exit" macro similar to the entry path.

We can also remove the logic at "return_to_new_vcpu" which detects returns to
hypervisor mode -- seemingly trying to handle hypervisor threads which aren't
an thing which we have. The idle VCPUs do not take this path. This simplifies
the return_to_new_vcpu code, we also split it into 32- and 64-bit VCPU paths.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
2013-07-29 16:54:50 +01:00
Ian Campbell 6487e2603c xen: arm: some cleanups to hypervisor entry code.
Tweak the case of some system registers for consistency.

There is no need to export return_to_hypervisor or return_to_guest.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
2013-07-29 16:54:50 +01:00
Ian Campbell d47bbc7e0c xen: arm: Set EL1 register width in HCR_EL2 during context switch.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-07-29 16:54:50 +01:00
Ian Campbell c39486b1c1 xen: arm: show less words in a line of a stack trace in 64-bit builds
Words are twice as wide so this ensures that a line is still <80 characters.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-07-29 16:54:50 +01:00
Ian Campbell 190ed52b62 xen: arm: support dumping 64-bit guest stack
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-07-29 16:54:50 +01:00
Ian Campbell 326f9a7690 xen: arm: improve register dump output for 64-bit guest (and more generally too)
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
2013-07-29 16:54:49 +01:00
Ian Campbell 40716b8322 xen: arm: precalculate VTTBR_EL2 for a domain when setting up its p2m
Mostly just to help with upcoming vcpu_show_registers changes.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-07-29 16:54:49 +01:00
Ian Campbell bcac10f827 xen: arm: support building a 64-bit dom0 domain
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-07-29 16:54:49 +01:00
Ian Campbell cb5e832146 xen: arm: support for loading 64-bit zImage dom0
This is defined in linux/Documentation/arm64/booting.txt.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-07-29 16:54:49 +01:00
Ian Campbell 767b17557f xen: arm: rename 32-bit specific zImage field offset constants
This will help avoid confusion when 64-bit Image support is added.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-07-29 16:54:49 +01:00
Ian Campbell 5b6c454fdf xen: arm: tweak arm64 stack frame layout
Correct definition of UREGS_kernel_sizeof and use it.

Correct adjustment of stack on entry and exit.

Add 64-bit versions of the build time checks for stack pointer alignment
correctness when pushing the stack frames.

Lastly, correct the padding in the stack frames to properly align the inner and
outer frames and also avoid an unnecessary 64bit padding field.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-07-29 16:54:49 +01:00
Ian Campbell 225ece4621 xen: arm: remove unnecessary cache flush in write_pte
On a ARMv7/v8 SMP system the MMU is coherent

Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
[ ijc -- dropped the associated dsb too ]
2013-07-29 16:54:48 +01:00
Julien Grall cda3deadd4 xen/arm: Clean up identify processor call for secondary cpus
The smp_processor_id() is set at the beginning of start_secondary. We don't
need to compute ourself the offset of the cpu data.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2013-07-29 16:54:48 +01:00
Julien Grall 6b8d02fe42 xen/arm: Allow secondary cpus to start in THUMB
Unlike bx, eret will not update the instruction set (THUMB,ARM) according to
the return address. This will result to an unpredicable behaviour for the
processor if the address doesn't match the right instruction set.

When the kernel is compiled with THUMB2, THUMB bit needs to be set in CPSR
for the secondary cpus.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2013-07-29 16:54:48 +01:00
Julien Grall d2a167258b xen/arm: Don't emulate the MMIO access if the instruction syndrome is invalid
When the instruction syndrome is not valid, the transfer register is unknown.
If this register is used in the emulation code (it's the case for the VGIC),
Xen can retrieve wrong data.

For safety, consider invalid instruction syndrome as wrong memory access.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2013-07-29 16:54:48 +01:00
Julien Grall c433774a6e xen/arm: Initialize PERCPU variables at the beginning of start_xen
PERCPU variables rely on HTPIDR (TPIDR_EL2) which is in an unknown state when
a processor boot.

For the boot CPU, the first use of PERCPU is in setup_pagetables. So
initialize PERCPU and set the processor ID before.

Bamvor Jian Zhang observed this failure on the sun6i processor which does not
initialise HTPIDR and contributed a very similar patch.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
[ ijc -- added last para of commit message ]
2013-07-29 16:54:39 +01:00
Tim Deegan 4936f1eab9 Don't take the domain lock for p2m operations.
P2M ops are covered by their own locks, and these uses of the domain
lock are relics of shadow-v1 code.

Signed-off-by: Tim Deegan <tim@xen.org>
Reviewed-by: Andres Lagar-Cavilla <andres@lagarcavilla.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
2013-07-29 16:13:19 +01:00
Ian Campbell fc8dbb8b45 xen: arm: panic if we cannot build dom0's p2m.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
2013-07-29 16:02:09 +01:00
Ian Campbell 31669dc394 xen: arm: remove dummy HYPERVISOR_arch_0 hypercall
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2013-07-29 16:01:05 +01:00
=John Liu 704302ce94 oxenstored: Protect oxenstored from malicious domains.
add check logic when read from IO ring, and if error happens,
then mark the reading connection as "bad", Unless vm reboot,
oxenstored will not handle message from this connection any more.

xs_ring_stubs.c: add a more strict check on ring reading
connection.ml, domain.ml: add getter and setter for bad flag
process.ml: if exception raised when reading from domain's ring,
            mark this domain as "bad"
xenstored.ml: if a domain is marked as "bad", do not handle it.

Signed-off-by: John Liu <john.liuqiming@huawei.com>
Acked-by: David Scott <dave.scott@eu.citrix.com>
2013-07-22 22:23:10 +01:00
George Dunlap 61917a0802 libxl: Add vif.default.backend to xl.conf
This will allow a user to default to a network driver domain
system-wide.

Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com>
Acked-by: Roger Pau Monné <roger.pau@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2013-07-22 22:20:59 +01:00
Konrad Rzeszutek Wilk f3e5942b1f xl: Enable by default claim mode.
During the Xen 4.3 release we discussed that this feature could be
turned on by default - as it benefits all of the guests - not just
tmem related.

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Acked-by: George Dunlap <george.dunlap@eu.citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2013-07-22 22:13:55 +01:00