Commit Graph
34322 Commits
Author SHA1 Message Date
Julien Grall 572190dbe5 xen/arm: vgic: Rename emulate_sysreg callback to emulate_reg
We will want to emulate co-processor registers access in a follow-up
patch.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-07 14:43:28 -08:00
Julien Grall cc9e34d57a xen/arm: vreg: Introduce vreg_emulate_cp{32,64}
Factorize the code to emulate 32-bit and 64-bit access to a co-processor
in specific helpers.

The new helpers will be used in different components to simplify the
emulation.

Finally, the prototypes for the callbacks to emulate 32-bit and 64-bit
co-processor access are the same as the sysreg one. Rather than
introducing new ones, repurpose the existent prototypes.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-07 14:38:40 -08:00
Julien Grall 836a0e2aec xen/arm: vtimer: Move emulate_sysreg* callback in a separate header
The core emulation of sysreg (reading/writing registers) is not specific
to the virtual timer. Move the helpers in a new header vreg.h.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-07 14:34:47 -08:00
Julien Grall ec54b2d029 xen/arm: vgic-v3: Build vgic-v3.c when CONFIG_HAS_GICV3 is enabled.
The vGICv3 depends whether Xen has a host driver for GICv3, not on the
architecture (AArch64 vs AArch32).

Note CONFIG_HAS_GICV3 is enabled only when for ARM64 build, so there is
no functional change.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-07 14:23:05 -08:00
Julien Grall fcf39f4671 xen/arm: vgic: Clean-up the sysreg emulation
Couple of clean-up for the vgic sysreg emulation:
    - Reference the public documentation rather than a non-public one
    - Let the vgic emulation decides whether a register needs to be
    emulated
    - Drop unnecessary debug printk. They don't bring much information
    and can be misleading (vGICv2 does not support those registers)

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-07 14:09:05 -08:00
Julien Grall 79305d41ef xen/arm: vgic: Switch emulate_sysreg return from int to bool
emulate_sysreg callback can only return 2 values: 0 or 1. Use bool
instead to make clear only two possible values exist.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-07 14:02:26 -08:00
Julien Grall 578993aacf xen/arm: vgic: Switch vgic_to_sgi return from int to bool and progate up to...
vgic_v{2,3}_to_sgi.

vgic_*to_sgi functions can only return 2 values: 0 or 1. Use bool instead
to make clear only two possible values exist.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Signed-off-by: Stefano Stabellini <sstabellini@kernel.org>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-07 14:01:38 -08:00
Julien Grall e3542f070b xen/arm: vgic: Switch from bool_t to bool
Since commit 9202342 "xen/build: Use C99 booleans", bool_t is an alias
to bool. Going forward, therer is a preference to use bool rather than
bool_t. Also replace 0 and 1 by false and true when relevant.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-07 13:52:21 -08:00
Julien Grall 3562558585 xen/arm: traps: Switch from bool_t to bool
Since commit 9202342 "xen/build: Use C99 booleans", bool_t is an alias
to bool. Going forward, there is a preference to use bool rather than
bool_t. Also replace 0 and 1 by true and false when relevant.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-07 13:50:38 -08:00
Julien Grall 8d5828e913 xen/arm: vtimer: Switch the read variable in the emulation from int to bool
The read variable can only take two values: 1 => read, 0 => write. Use
bool instead to make clear the variable can only take 2 values.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-07 13:44:56 -08:00
Julien Grall 748f5329fa xen/arm: vtimer: Switch the emulation functions return from int to bool
The emulation functions are always returning 0 or 1. Use bool instead to
make clear only two possible values exist.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-07 13:42:44 -08:00
Stefano Stabellini 779a0e15ca xen/arm: fix smpboot barriers
Remove useless smp_wmb() barrier after cpumask_set_cpu(cpuid,
&cpu_online_map), which is not synchronizing against anything.

Keep the other smp_wmb(), before the cpumask_set_cpu call, to ensure
that all writes before setting the cpu online are visible to other cpus.
For that to work properly, we need a corresponding smp_rmb() barrier,
after reading the online cpumask from other processors, which is
currently missing. Add it.

See: http://marc.info/?l=xen-devel&m=148093236307211

Signed-off-by: Stefano Stabellini <sstabellini@kernel.org>
Reviewed-by: Julien Grall <julien.grall@arm.com>
2016-12-07 11:17:26 -08:00
Ian Jackson 395010f346 QEMU_TAG update 2016-12-07 16:52:23 +00:00
Ian Jackson 7b331606cd misc/release-checklist: Import from xenbits:~xen/release-checklist
This checklist is what we use when releasing, branching, and making
tarballs.  Right I want to commit an exact copy of the live copy kept
on xenbits outside version control.  I am fed up of maintaining this
outside version control, and probably xen.git is the best place to put
it.

I have reviewed the contents and while it contains much that might be
considered embarrassing, it doesn't contain any secrets :-).

I suggest that:

 * This file should live in misc/ rather than docs/ on the grounds
   that no-one else is likely to ever want it.

 * We maintain the copy in xen.git#staging as the master copy for all
   branches.  When things change they are more often changes to
   infrastructure organisation and so on.  So the file will continue
   to contain explicit treatment for old Xen branches.

 * We will not retain information about branches which are out of
   security support.  (So some of what is there can be deleted at our
   leisure.)

 * This file will be maintained by the release technicians (currently
   mostly that means me, although others have done some parts of the
   task) and commits will be made by release technicians without
   further review or acks.

Please argue about the filename :-).

Signed-off-by: Ian Jackson <Ian.Jackson@eu.citrix.com>
CC: Andrew Cooper <andrew.cooper3@citrix.com>
CC: George Dunlap <George.Dunlap@eu.citrix.com>
CC: Jan Beulich <jbeulich@suse.com>
CC: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
CC: Stefano Stabellini <sstabellini@kernel.org>
CC: Tim Deegan <tim@xen.org>
CC: Wei Liu <wei.liu2@citrix.com>
2016-12-07 16:48:41 +00:00
Roger Pau Monné 0f40a54e1b libacpi: don't announce a 8042 controller in the FADT for PVHv2 guests
There's no such controler available for PVHv2 guests.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-12-07 17:13:59 +01:00
Roger Pau Monné 8a8ce70ccf libacpi: set FADT boot flag to notify lack of VGA for PVHv2 guests
PVHv2 guests don't have any VGA card, and as so it must be notified in the FADT.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-12-07 17:10:37 +01:00
Roger Pau Monné a900e98f1f libacpi: add _FADT_ to the FADT boot flags definitions
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-12-07 17:07:09 +01:00
Jan Beulich b853489598 x86emul: correct and extend IDT entry checks
In order to pre-determine whether a fault will occur upon software
interrupt injection, it is not sufficient to just check P and DPL. Do
at least all the checks on the IDT entry itself, and in particular do
the #NP check last. The checks for the new CS (and perhaps SS) are left
out for now, though.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citirix.com>
2016-12-07 15:39:03 +01:00
Jan Beulich 216c297656 x86emul: don't assume a memory operand
Especially for x86_insn_operand_ea() to return dependable segment
information even when the caller didn't consider applicability, we
shouldn't have ea.type start out as OP_MEM. Make it OP_NONE instead,
and set it to OP_MEM when we actually encounter memory like operands.

This requires to eliminate the XSA-123 fix, which has been no longer
necessary since the elimination of the union in commit dd766684e7. That
in turn allows restricting the scope of override_seg to x86_decode().
At this occasion also make it have a proper type, instead of plain int.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-12-07 14:39:08 +01:00
Daniel Kiper 7a95e0a2c5 x86: properly calculate xen ELF end of image address
This patch is prereq for "efi: build xen.gz with EFI code" patch which adds,
among others, xen/arch/x86/efi/relocs-dummy.S to xen.gz output. Below there
is a description why it is needed.

Currently xen ELF end of image address is calculated using first line from
"nm -nr xen/xen-syms" output. However, potentially it may contain symbol
address not related to the end of image in any way. It can happen if a symbol
is introduced with address larger than _end symbol address. Such situation
encountered when I linked xen ELF binary with xen/arch/x86/efi/relocs-dummy.S.
Then first line from "nm -nr xen/xen-syms" contained "ffff82d0c0000000 A ALT_START"
and xen ELF image memory size was silently set to 1023 MiB. This issue happened
because there is no check which symbol address is used to calculate end of
image address. So, let's fix it and take ELF end of image address by reading
__2M_rwdata_end symbol address from nm output. This way xen ELF image build
process is not prone to changes in order of nm output.

Signed-off-by: Daniel Kiper <daniel.kiper@oracle.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-12-07 14:37:34 +01:00
Daniel Kiper a31dc93b20 x86: allow EFI reboot method neither on non-EFI platforms...
... nor EFI platforms with runtime services enabled.

Suggested-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Daniel Kiper <daniel.kiper@oracle.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-12-07 14:37:11 +01:00
Daniel Kiper 146786b922 efi: create efi_enabled()
First of all we need to differentiate between legacy BIOS
and EFI platforms during runtime, not during build, because
one image will have legacy and EFI code and can be executed
on both platforms. Additionally, we need more fine grained
knowledge about EFI environment and check for EFI platform
and EFI loader separately to properly support multiboot2
protocol. In general Xen loaded by this protocol uses memory
mappings and loaded modules in similar way to Xen loaded by
multiboot (v1) protocol. Hence, create efi_enabled() which
checks available features in efi_flags. This patch defines
EFI_BOOT, EFI_LOADER and EFI_RS features. EFI_BOOT is equal
to old efi_enabled == 1. EFI_RS ease control on runtime
services usage. EFI_LOADER tells that Xen was loaded
directly from EFI as PE executable.

Suggested-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Daniel Kiper <daniel.kiper@oracle.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-12-07 14:36:11 +01:00
Juergen Gross f343852c5e x86: add a way to obtain the needed number of memory map entries
Today there is no way for a domain to obtain the number of entries of
the machine memory map returned by XENMEM_machine_memory_map hypercall.

Modify the interface to return just the needed number of map entries
in case the buffer was specified as NULL.

Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-12-07 14:03:08 +01:00
Jan Beulich f4497d6b74 x86emul/test: add a private header
This is to avoid having to duplicate auxiliary definitions in both
source files.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-12-07 13:57:18 +01:00
Jan Beulich e5c1b8145b x86emul: correct PUSHF/POPF
Both need to raise #GP(0) when in VM86 mode with IOPL < 3.

Additionally PUSHF is documented to clear VM and RF from the value
placed onto the stack.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-12-07 13:55:42 +01:00
Jan Beulich 3eabc1c2e2 x86/HVM: drop __hvm_clear()
Rather than almost entirely duplicating __hvm_copy(), have __hvm_copy()
clear guest memory if the source pointer is NULL.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-12-07 13:55:14 +01:00
Jan Beulich 56673a8eb7 x86/HVM: drop hvm_emulate_one_no_write()
It was pointlessly non-static, and being static and a simple wrapper it
can as well be folded into its single caller.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-12-07 13:54:41 +01:00
Jan Beulich a01b6d464f libelf: treat phdr and shdr similarly
Just like elf_shdr_count(), elf_phdr_count() better bounds checks the
value.

Add table entry size checks to elf_init().

Also both program and section headers are optional, and hence their
checking better is done conditionally only when any such headers are
present.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
2016-12-07 13:53:50 +01:00
Jan Beulich 397f64d126 libelf: type adjustments
Don't needlessly use uint64_t when unsigned suffices.

Also don't open code elf_phdr_count() and replace a redundant call to
elf_shdr_count().

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
2016-12-07 13:53:28 +01:00
Jan Beulich d4c856a57a libelf: use UINT_MAX
While Xen indeed doesn't have limits.h, it still does have UINT_MAX, so
we should avoid open coding it (and perhaps - even if unlikely -
getting it wrong).

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
2016-12-07 13:52:59 +01:00
Jan Beulich 41fe9cabf2 libelf: section index 0 is special
When iterating over sections, table entry zero needs to be ignored.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
2016-12-07 13:52:35 +01:00
Jan Beulich bb5910ff0f x86/memshr: add static
And with that drop mem_sharing_ prefixes as no longer meaningful. Once
again convert GFN function argument types at once.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Tamas K Lengyel <tamas@tklengyel.com>
2016-12-07 13:52:00 +01:00
Jan Beulich b053c185e3 x86: make more use of wr{f,g}sbase()
With suitable canonical address checks added these can also be used in
do_set_segment_base().

Also with a canonical address check now in place, there's no need for
priv_op_write_msr() to use wrmsr_safe() anymore.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-12-07 13:50:22 +01:00
Jan Beulich ca9a016d52 x86/HVM: prefer structure assignment for seg reg copying
This makes things type safe.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
2016-12-07 13:49:08 +01:00
Cédric Bosdonnat f33b4fc4ef libxl: invert xc and domain model resume calls in xc_domain_resume()
Resume is sometimes silently failing for HVM guests. Getting the
xc_domain_resume() and libxl__domain_resume_device_model() in the
reverse order than what is in the suspend code fixes the problem.

Signed-off-by: Cédric Bosdonnat <cbosdonnat@suse.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
[ wei: rebase it on top of staging ]
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
2016-12-07 11:12:41 +00:00
Andrew Cooper ea33d31b0c xen/common: Replace incorrect mandatory barriers with SMP barriers
Mandatory barriers are only for use with reduced-cacheability MMIO mappings.

All of these uses are just to deal with shared memory between multiple
processors, so use the smp_*() which are the correct barriers for the purpose.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-07 10:02:37 +00:00
Artem Mygaiev 2a854e414f xen/arm: Fix macro for ARM Jazelle CPU feature identification
Fix macro for ARM Jazelle CPU feature identification: value of 0 indicates
that CPU does not support ARM Jazelle (ID_PFR0[11:8])

Coverity-ID: 1381849

Signed-off-by: Artem Mygaiev <artem_mygaiev@epam.com>
Signed-off-by: Stefano Stabellini <sstabellini@kernel.org>
Reviewed-by: Julien Grall <julien.grall@arm.com>
2016-12-06 10:39:49 -08:00
Julien Grall fff6bd8cb6 xen/arm: traps: Emulate ICC_SRE_EL1 as RAZ/WI
Recent Linux kernel (4.4 and onwards [1]) is checking whether it is possible
to enable sysreg access (ICC_SRE_EL1.SRE) when the ID register
(ID_AA64PRF0_EL1.GIC) is reporting the presence of the sysreg interface.

When the guest has been configured to use GICv2, the hypervisor will
disable sysreg access for this vm (via ICC_SRE_EL2.Enable) and therefore
access to system register such as ICC_SRE_EL1 are trapped in EL2.

However, ICC_SRE_EL1 is not emulated by the hypervisor. This means that
Linux will crash as soon as it is trying to access ICC_SRE_EL1.

To solve this problem, Xen can implement ICC_SRE_EL1 as read-as-zero
write-ignore. The emulation will only be used when sysreg are disabled
for EL1.

[1]  963fcd409 "arm64: cpufeatures: Check ICC_EL1_SRE.SRE before
enabling ARM64_HAS_SYSREG_GIC_CPUIF"

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-06 10:32:11 -08:00
Artem Mygaiev 4404676e06 xen/arm: Fix misplaced parentheses for PSCI version check
Fix misplaced parentheses for PSCI version check

Signed-off-by: Artem Mygaiev <artem_mygaiev@epam.com>
Reviewed-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-06 10:32:11 -08:00
Oleksandr Tyshchenko 02fea427a6 arm/irq: Reorder check when the IRQ is already used by someone
Call irq_get_domain for the IRQ we are interested in
only after making sure that it is the guest IRQ to avoid
ASSERT(test_bit(_IRQ_GUEST, &desc->status)) triggering.

Signed-off-by: Oleksandr Tyshchenko <oleksandr_tyshchenko@epam.com>
Signed-off-by: Andrii Anisov <andrii_anisov@epam.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-06 10:32:11 -08:00
Sameer Goel 9f954a5e90 Revert "xen/arm: do not relocate Xen outside of visible RAM"
This reverts commit db92b1ac55.

The restriction on non contiguous memory was resolved by commit
2d02b05c77:
"xen: arm: improve handling of system with non-contiguous RAM regions"

So, reverting this change,to enable Xen image placement at the end of the
useable system RAM.

Signed-off-by: Sameer Goel <sgoel@codeaurora.org>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-06 10:32:11 -08:00
Peng Fan ab5b00ab49 xen/arm: domain_build: allocate lowmem for dom0 as much as possible
On AArch64 SoCs, some IPs may only have the capability to access
32 bits address space. The physical memory assigned for Dom0 maybe
not in 4GB address space, then the IPs will not work properly.
So need to allocate memory under 4GB for Dom0.

There is no restriction that how much lowmem needs to be allocated for
Dom0 ,so allocate lowmem as much as possible for Dom0.

This patch does not affect 32-bit domain, because Variable "lowmem" is
set to true at the beginning. If failed to allocate bank0 under 4GB,
need to panic for 32-bit domain, because 32-bit domain requires bank0
be allocated under 4GB.

For 64-bit domain, set "lowmem" to false, and continue allocating
memory from above 4GB.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Julien Grall <julien.grall@arm.com>
Cc: Stefano Stabellini <sstabellini@kernel.org>
Cc: Julien Grall <julien.grall@arm.com>
2016-12-06 10:32:11 -08:00
Jun Sun c655b112fb Don't clear HCR_VM bit when updating VTTBR.
Currently function p2m_restore_state() would clear HCR_VM bit, i.e.,
disabling stage2 translation, before updating VTTBR register. After
some research and talking to ARM support, I got confirmed that this is not
necessary. We are currently working on a new platform that would need this
to be removed.

The patch is tested on FVP foundation model.

Signed-off-by: Jun Sun <jsun@junsun.net>
Acked-by: Steve Capper <steve.capper@linaro.org>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
2016-12-06 10:32:10 -08:00
Juergen Gross e25ddb6dae tools/xenstore: avoid unterminated string in xs_directory_part()
Commit d4016288ab ("xenstore: support XS_DIRECTORY_PART in
libxenstore") introduced a theoretical bug: the generation count of
the read node is transferred via strncpy without forcing a NUL byte
at the end. Correct this.

Signed-off-by: Juergen Gross <jgross@suse.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-12-06 11:59:37 +00:00
Wei Liu cb6ae256e8 xen: convert lto to Kconfig option
Introduce CONFIG_LTO in Kconfig. Since this is the last option to be
converted to Kconfig, delete the preceding comment in Rules.mk as well.

Make it depend on BROKEN because it doesn't work at the moment.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Jan Beulich <JBeulich@suse.com>
2016-12-06 09:57:21 +00:00
Wei Liu dcdc58a6db Travis-ci: specify KCONFIG_ALLCONFIG for randconfig
The file provided contains symbols that must be set to certain values.
This then prevents random build breakage in travis due to
known-incompatible symbol selections.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Doug Goldstein <cardoe@cardoe.com>
2016-12-06 09:54:38 +00:00
Wei Liu 74fe8f2792 Kconfig: introduce allrandom.config
This would be used to force selection of certain items in randconfig.

We need this to force gcov format to be autodetected in randconfig
target, which would avoid generating known-incompatible combinations.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Doug Goldstein <cardoe@cardoe.com>
2016-12-06 09:54:10 +00:00
Andrew Cooper 503148ae5a x86/emul: Drop the last remaining uses of bool_t
And drop the compatibility typedef from the userspace harness

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-12-05 15:04:58 +00:00
Andrew Cooper a6c406c1f4 x86/hvm: Assert some expectations in hvm_inject_event()
Check that event->error_code is appropriate for the type/vector combination.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-12-05 15:04:58 +00:00
Andrew Cooper c31f3be9b4 x86/emul: Debugging improvements to the test harness
Disable stdout buffering, so logging gets out even if the harness crashes.
Add a verbose option (compile time disabled) which dumps all read/write calls
the harness makes

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-12-05 14:44:53 +00:00