Commit Graph
39163 Commits
Author SHA1 Message Date
Andrew Cooper df4e4cafd2 x86/altp2m: Fix style errors introduced with c/s 9abcac7ff
Drop introduced trailing whitespace, excessively long lines, mal-indention,
superfluous use of PRI macros for int-or-smaller types, and incorrect PRI
macros for gfns and mfns.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: George Dunlap <george.dunlap@citrix.com>
2019-05-29 14:39:28 +01:00
Tamas K Lengyel 9abcac7ff1 x86/altp2m: cleanup p2m_altp2m_lazy_copy
The p2m_altp2m_lazy_copy is responsible for lazily populating an
altp2m view when the guest traps out due to no EPT entry being present
in the active view.  Currently, in addition to taking a number of
unused argements, the whole calling convention has a number of
redundant p2m lookups: the function reads the hostp2m, even though the
caller has just read the same hostp2m entry; and then the caller
re-reads the altp2m entry that the function has just read (and possibly set).

Rework this function to make it a bit more rational.  Specifically:

- Pass the current hostp2m entry values we have just read for it to
  use to populate the altp2m entry if it finds the entry empty.

- If the altp2m entry is not empty, pass out the values we've read so
  the caller doesn't need to re-walk the tables

- Either way, return with the gfn 'locked', to make clean-up handling
  more consistent.

Rename the function to better reflect this functionality.

While we're here, change bool_t to bool, and return true/false rather
than 1/0.

It's a bit grating to do both the p2m_lock() and the get_gfn(),
knowing that they boil down to the same thing at the moment; but we
have to maintain the fiction until such time as we decide to get rid
of it entirely.

Signed-off-by: Tamas K Lengyel <tamas@tklengyel.com>
Signed-off-by: George Dunlap <george.dunlap@citrix.com>
Tested-by: Tamas K Lengyel <tamas@tklengyel.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2019-05-28 14:10:36 +01:00
Juergen Gross 81646cea82 vm_event: fix rc check for uninitialized ring
vm_event_claim_slot() returns -EOPNOTSUPP for an uninitialized ring
since commit 15e4dd5e86 ("common/vm_event: Initialize vm_event
lists on domain creation"), but the callers test for -ENOSYS.

Correct the callers.

Signed-off-by: Juergen Gross <jgross@suse.com>
Acked-by: Razvan Cojocaru <rcojocaru@bitdefender.com>
2019-05-27 12:26:20 +02:00
Jan Beulich 441f61ca1d vsprintf: constify "end" parameters
Except in the top level function we don't mean to ever write through
"end". The variable is used solely for pointer comparison purposes
there. Add const everywhere.

Also make function heading wrapping style uniform again for all of the
involved functions.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-27 12:25:44 +02:00
Jan Beulich ff66ccefe5 x86/CPUID: adjust SSEn dependencies
Along the lines of b9f6395590 ("x86/cpuid: adjust dependencies of
post-SSE ISA extensions") further convert SSEn dependencies to be more
chain like, with each successor addition depending on its immediate
predecessor. This is more in line with how hardware has involved, and
how other projects like gcc and binutils connect things together.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-27 12:24:37 +02:00
Wei Liu 88e798210b MAINTAINERS: update my email address
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
Acked-by: George Dunlap <george.dunlap@citrix.com>
2019-05-24 20:26:43 +01:00
Andrew Cooper 6fdde9e308 tests/cpu-policy: Skip building on older versions of GCC
GCC 4.4 (as included in CentOS 6) is too old to handle designated initialisers
in anonymous unions.  As this is just a developer tool, skip the test in this
case, rather than sacraficing the legibility/expresibility of the test cases.

This fixes the Gitlab CI tests.

While adding this logic to cpu-polcy, adjust the equivelent logic from
x86_emulator on which this was based.  Printing:

  Test harness not built, use newer compiler than "gcc"

isn't helpful for anyone unexpectedly encountering the error.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-05-24 17:50:57 +01:00
Alistair Francis 188164069a gitignore: ignore xen.lds and asm-offsets.s for all archs
Instead of ignoring xen.lds and asm-offsets.s for every specific arch,
let's instead just use gitignore's wildcard feature to ignore them for
all archs.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2019-05-24 10:30:39 +02:00
Igor Druzhinin 6761965243 libacpi: report PCI slots as enabled only for hotpluggable devices
DSDT for qemu-xen lacks _STA method of PCI slot object. If _STA method
doesn't exist then the slot is assumed to be always present and active
which in conjunction with _EJ0 method makes every device ejectable for
an OS even if it's not the case.

qemu-kvm is able to dynamically add _EJ0 method only to those slots
that either have hotpluggable devices or free for PCI passthrough.
As Xen lacks this capability we cannot use their way.

qemu-xen-traditional DSDT has _STA method which only reports that
the slot is present if there is a PCI devices hotplugged there.
This is done through querying of its PCI hotplug controller.
qemu-xen has similar capability that reports if device is "hotpluggable
or absent" which we can use to achieve the same result.

Signed-off-by: Igor Druzhinin <igor.druzhinin@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-05-24 10:30:21 +02:00
Alistair Francis cace51fe35 drivers/char: protect the asm/vpl011.h include
The only use of asm/vpl011.h is protected by the CONFIG_SBSA_VUART_CONSOLE
define so lets protect the include as well.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
2019-05-24 10:29:04 +02:00
Norbert Manthey 7e69db644a common/grant_table: harden helpers
Guests can issue grant table operations and provide guest controlled
data to them. This data is used for memory loads in helper functions
and macros. To avoid speculative out-of-bound accesses, we use the
array_index_nospec macro where applicable, or the block_speculation
macro.

This is part of the speculative hardening effort.

Signed-off-by: Norbert Manthey <nmanthey@amazon.de>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-05-24 10:28:26 +02:00
Jan Beulich 2f44d1b3a2 x86emul: support AVX512{F,ER} reciprocal insns
Also include the only other AVX512ER insn pair, VEXP2P{D,S}.

Note that despite the replacement of the SHA insns' table slots there's
no need to special case their decoding: Their insn-specific code already
sets op_bytes (as was required due to simd_other), and TwoOp is of no
relevance for legacy encoded SIMD insns.

The raising of #UD when EVEX.L'L is 3 for AVX512ER scalar insns is done
to be on the safe side. The SDM does not clarify behavior there, and
it's even more ambiguous here (without AVX512VL in the picture).

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-24 10:27:24 +02:00
Jan Beulich 42ad3d019a x86emul: support remaining AVX512BW legacy-equivalent insns
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-24 10:26:09 +02:00
Jan Beulich b3e9a2d880 x86emul: support remaining AVX512F legacy-equivalent insns
Plus their AVX512BW counterparts.

Take the opportunity and also eliminate a pair of open coded instances
of scalar_1op().

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-24 10:25:26 +02:00
Jan Beulich fb046f041c x86emul: support AVX512{F,DQ} FP-to-uint conversion insns
Along the lines of prior patches, VCVT{,T}PS2UQQ as well as
VCVT{,T}S{S,D}2USI need "manual" overrides of disp8scale.

The twobyte_table[] entries get altered, with their prior values
now put in place in x86_decode_twobyte().

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-24 10:24:48 +02:00
Jan Beulich 24ed2c86bd x86emul: support AVX512{F,DQ} uint-to-FP conversion insns
Some "manual" overrides of disp8scale are needed here again. In
particular code ends up simpler when using d8s_dq64 in the
twobyte_table[] entry.

Test harness additions will be done once the reverse conversions are
also available.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-24 10:24:11 +02:00
Jan Beulich d45ff77f7e x86emul: support AVX512DQ packed quad-int/FP conversion insns
VCVT{,T}PS2QQ, sharing their main opcodes with others, once again need
"manual" overrides of disp8scale.

While not directly related here, also add a scalar variant of to_wint()
to the test harness.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-24 10:23:31 +02:00
Jan Beulich baf4a376f5 x86emul: support AVX512F legacy-equivalent scalar int/FP conversion insns
VCVT{,T}S{S,D}2SI use EVEX.W for their destination (register) rather
than their (possibly memory) source operand size and hence need a
"manual" override of disp8scale.

While the SDM claims that EVEX.L'L needs to be zero for the 32-bit forms
of VCVT{,U}SI2SD (exception type E10NF), observations on my test system
do not confirm this (and I've got informal confirmation that this is a
doc mistake). Nevertheless, to be on the safe side, force evex.lr to be
zero in this case though when constructing the stub.

Slightly adjust the scalar to_int() in the test harness, to increase the
chances of the operand ending up in memory.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-24 10:22:55 +02:00
Jan Beulich ed806f3737 x86emul: support AVX512F legacy-equivalent packed int/FP conversion insns
... including the two AVX512DQ forms which shared encodings, just with
EVEX.W set there.

VCVTDQ2PD, sharing its main opcode with others, needs a "manual"
override of disp8scale.

The simd_size changes for the twobyte_table[] entries are benign to
pre-existing code, but allow decode_disp8scale() to work as is here.

The at this point wrong placement of the 0xe6 case block is once again
in anticipation of further additions of case labels.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-24 10:22:18 +02:00
Jan Beulich 4037a62ef9 x86emul: support AVX512F floating-point conversion insns
VCVTPS2PD, sharing its main opcode with others, needs a "manual"
override of disp8scale.

The simd_size change for twobyte_table[0x5a] is benign to pre-existing
code, but allows decode_disp8scale() to work as is here.

Also correct the comment on an AVX counterpart.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-24 10:21:30 +02:00
Jan Beulich ca9310b24e x86/IO-APIC: fix build with gcc9
There are a number of pointless __packed attributes which cause gcc 9 to
legitimately warn:

utils.c: In function 'vtd_dump_iommu_info':
utils.c:287:33: error: converting a packed 'struct IO_APIC_route_entry' pointer (alignment 1) to a 'struct IO_APIC_route_remap_entry' pointer (alignment 8) may result in an unaligned pointer value [-Werror=address-of-packed-member]
  287 |                 remap = (struct IO_APIC_route_remap_entry *) &rte;
      |                                 ^~~~~~~~~~~~~~~~~~~~~~~~~

intremap.c: In function 'ioapic_rte_to_remap_entry':
intremap.c:343:25: error: converting a packed 'struct IO_APIC_route_entry' pointer (alignment 1) to a 'struct IO_APIC_route_remap_entry' pointer (alignment 8) may result in an unaligned pointer value [-Werror=address-of-packed-member]
  343 |     remap_rte = (struct IO_APIC_route_remap_entry *) old_rte;
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~

Simply drop these attributes. Take the liberty and also re-format the
structure definitions at the same time.

Reported-by: Charles Arnold <carnold@suse.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-24 10:19:59 +02:00
Andrew Cooper 679216943f x86/boot: Link opt_dom0_verbose to CONFIG_VERBOSE_DEBUG
We currently have an asymmetric setup where CONFIG_VERBOSE_DEBUG controls
extra diagnostics for a PV dom0, and opt_dom0_verbose controls extra
diagnostics for a PVH dom0.

Default opt_dom0_verbose to CONFIG_VERBOSE_DEBUG and use opt_dom0_verbose
consistently.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-05-23 15:59:00 +01:00
Andrew Cooper 8978d258bb x86/boot: Wire up dom0=shadow for PV dom0
This would have been very handy when debugging some pv-l1tf issues.  As there
is no cost to supporting it, wire it up.

Due to the way dom0 is constructed, switching into shadow mode must be done
after the pagetables are written, and because of partially being in dom0
context, shadow_enable() doesn't like the state it finds.

Reuse the pv_l1tf tasklet for convenience, which will switch dom0 into shadow
mode just before it starts executing.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-05-23 15:59:00 +01:00
Andrew Cooper 15ce091dd8 x86/boot: Rename dom0_{pvh,verbose} variables to have an opt_ prefix
For consistency with other command line options.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2019-05-23 15:59:00 +01:00
Andrew Cooper 8207314d98 x86/pv: Fix error handling in dom0_construct_pv()
One path in dom0_construct_pv() returns -1 unlike all other error paths.
Switch it to returning -EINVAL.

This was last modified by c/s c84481fb XSA-55, but the bug predates that
series.  However, this patch did (for no obvious reason) introduce a
bifurcated tail to the function with two subtly different elf_check_broken()
clauses.

As the elf_check_broken() is just a warning and doesn't influence the further
boot, fold the exit paths together and use a single clause.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-05-23 15:59:00 +01:00
Andrew Cooper 2eed83a9aa libx86: Elide more empty CPUID leaves when serialising a policy
x86_cpuid_copy_to_buffer() currently serialises the full content of the
various subleaf unions.  While leaves 4, 0xb and 0xd don't have a concrete
max_subleaf field, they do have well defined upper bounds.

Diffing the results of `xen-cpuid -p` shows the resulting saving:

  @@ -1,5 +1,5 @@
   Xen reports there are maximum 114 leaves and 1 MSRs
  -Raw policy: 93 leaves, 1 MSRs
  +Raw policy: 38 leaves, 1 MSRs
    CPUID:
     leaf     subleaf  -> eax      ebx      ecx      edx
     00000000:ffffffff -> 00000016:756e6547:6c65746e:49656e69
  @@ -32,7 +32,7 @@ Raw policy: 93 leaves, 1 MSRs
    MSRs:
     index    -> value
     000000ce -> 0000000080000000
  -Host policy: 93 leaves, 1 MSRs
  +Host policy: 33 leaves, 1 MSRs
    CPUID:
     leaf     subleaf  -> eax      ebx      ecx      edx
     00000000:ffffffff -> 0000000d:756e6547:6c65746e:49656e69

which is mostly due to no longer writing out 64 leaves for xstate when (on
this CoffeeLake system) 8 will do.

Extend the unit tests to cover empty and partially filled subleaf unions.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-05-23 15:54:06 +01:00
Andrew Cooper ad8e6232d5 libx86: Introduce wrappers for extracting XCR0/XSS from a cpuid policy
This avoids opencoding the slightly-awkward logic.  More uses of these
wrappers will be introduced shortly.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-05-23 15:54:05 +01:00
Wei Liu 3c16684d06 Revert "libxl: add helper function to set device_model_version"
This reverts commit 3802ecbaa9.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
2019-05-22 09:09:08 +01:00
Wei Liu b36d4fc65a Revert "libxl: fix migration of PV and PVH domUs with and without qemu"
This reverts commit 899433f149.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
2019-05-22 09:08:56 +01:00
Wei Liu c44c6ba695 Revert "libxl: fix libxl_domain_need_memory after 899433f149d"
This reverts commit 278c64519c.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
2019-05-22 09:08:41 +01:00
Julien Grall 4973997f70 xen/arm64: livepatch: Fix build after 03957f58db
Commit 03957f58db "xen/const: Extend the existing macro BIT to take a
suffix in parameter" didn't convert all the callers of the macro BIT.

This will result to a build breakage when enabling Livepatch on arm64.

Reported-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Julien Grall <julien.grall@arm.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-21 15:32:34 +01:00
Jan Beulich 7520e6fc2f x86emul: support AVX512BW pack insns
No further test harness additions - what is there is good enough for
these rather "regular" insns.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-21 15:47:22 +02:00
Jan Beulich 825ad98d65 x86emul: support AVX512{F,BW,_VBMI} permute insns
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-21 15:46:41 +02:00
Jan Beulich ab271594f2 x86emul: support AVX512F move duplicate insns
Judging from insn prefixes, these are scalar insns, but their (memory)
operands are vector ones (with the exception of 128-bit VMOVDDUP). For
this some adjustments to disp8scale calculation code are needed.

No explicit test harness additions other than the overrides, as the
compiler already makes use of the insns.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-21 15:45:59 +02:00
Jan Beulich cda748bc32 x86emul: support AVX512F move high/low insns
No explicit test harness additions other than the overrides, as the
compiler already makes use of the insns.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-21 15:45:06 +02:00
Jan Beulich 97e4ebdcd7 x86/CPUID: support leaf 7 subleaf 1 / AVX512_BF16
The AVX512_BF16 feature flag resides in this so far blank sub-leaf.
Expand infrastructure accordingly.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-21 15:43:00 +02:00
Julien Grall b915f57a49 xen/x86: Constify the parameter "d" in mfn_to_gfn
The parameter "d" holds the domain and is not modified by the function.
So constify it.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-05-21 13:42:21 +01:00
Julien Grall f582878732 xen/arm: Use mfn_to_pdx instead of pfn_to_pdx when possible
mfn_to_pdx adds more safety than pfn_to_pdx. Replace all but on place in
the Arm code to use the former.

No functional changes.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2019-05-21 13:41:44 +01:00
Julien Grall 8603d4a284 xen/arm: processor: Use BIT(.., UL) instead of _AC(1, U) in SCTLR_ defines
Use the pattern BIT(..., UL) to make the code more readable. Note that
unsigned long is used instead of unsigned because SCTLR is technically
32-bit on Arm32 and 64-bit on Arm64.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2019-05-21 11:59:29 +01:00
Julien Grall 40d8280213 xen/arm: Rename SCTLR_* defines and remove unused one
The SCTLR_* are currently used for SCTLR/HSCTLR (arm32) and
SCTLR_EL1/SCTLR_EL2 (arm64).

The naming scheme is actually quite confusing because they may only be
defined for an archicture (or even an exception level). So it is not easy
for the developer to know which one to use.

The naming scheme is reworked by adding Axx_ELx in each define:
    * xx is replaced by 32 or 64 if specific to an architecture
    * x is replaced by 2 (hypervisor) or 1 (kernel) if specific to an
    exception level

While doing the renaming, remove the unused defines (or at least the ones
that are unlikely going to be used).

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2019-05-21 11:59:29 +01:00
Julien Grall a4d85a9287 xen/arm: tlbflush: Clarify the TLB helpers name
TLB helpers in the headers tlbflush.h are currently quite confusing to
use the name may lead to think they are dealing with hypervisors TLBs
while they actually deal with guest TLBs.

Rename them to make it clearer that we are dealing with guest TLBs.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
2019-05-21 11:59:29 +01:00
Julien Grall 7ad0e78085 xen/arm: Remove flush_xen_text_tlb_local()
The function flush_xen_text_tlb_local() has been misused and will result
to invalidate the instruction cache more than necessary.

For instance, there is no need to invalidate the instruction cache if
we are setting SCTLR_EL2.WXN.

There is effectively only one caller (i.e free_init_memory() who would
need to invalidate the instruction cache.

So rather than keeping around the function flush_xen_text_tlb_local()
replace it with call to flush_xen_tlb_local() and explicitly flush
the cache when necessary.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2019-05-21 11:59:29 +01:00
Julien Grall 505f1f0b19 xen/arm: mm: Consolidate setting SCTLR_EL2.WXN in a single place
The logic to set SCTLR_EL2.WXN is the same for the boot CPU and
non-boot CPU. So introduce a function to set the bit and clear TLBs.

This new function will help us to document and update the logic in a
single place.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2019-05-21 11:59:29 +01:00
Julien Grall 03957f58db xen/const: Extend the existing macro BIT to take a suffix in parameter
Arm currently provides two macro BIT and BIT_ULL that are only usable
in C and return respectively unsigned long and unsigned long long.

Extending the macros to deal with assembly would be a nice benefits as
it could replace the common pattern to define fields (AC(1, sfx) << X)
easier to read.

Rather than extending the two macros, it was decided to drop BIT_ULL()
and extend the macro BIT() to take a suffix (e.g U, UL, ULL) in
parameter. This would allow to use different suffix without having to
define new macros.

The new extend macro is now moved in include/xen/const.h so it can be
used by anyone in Xen and also avoid to include bitops.h in assembly
code.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2019-05-21 11:59:29 +01:00
Alistair Francis 57d87ee3a5 autotools: Updage config.guess and config.sub
The autoconf manual [1] specifies that as we define AC_CANONICAL_HOST we
must supply config.guess and config.sub. In which case let's update them
from [2] commit: b98424c24 "config.guess: Remove space after "#endif", as
Gnulib and some"

This allows us to support more achitectures (RISC-V) and other general
improvements.

1: https://www.gnu.org/software/autoconf/manual/autoconf.html#Canonicalizing
2: https://git.savannah.gnu.org/cgit/config.git/

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2019-05-21 11:57:05 +01:00
Andrew Cooper 91f86f8634 x86/svm: Drop support for AMD's Lightweight Profiling
Lightweight Profiling was introduced in Bulldozer (Fam15h), but was dropped
from Zen (Fam17h) processors.  Furthermore, LWP was dropped from Fam15/16 CPUs
when IBPB for Spectre v2 was introduced in microcode, owing to LWP not being
used in practice.

As a result, CPUs which are operating within specification (i.e. with up to
date microcode) no longer have this feature, and therefore are not using it.

Drop support from Xen.  The main motivation here is to remove unnecessary
complexity from CPUID handling, but it also tidies up the SVM code nicely.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Brian Woods <brian.woods@amd.com>
2019-05-21 10:44:00 +01:00
Andrew Cooper 37bb9bb49a xen/boot: Print the build-id along with the changeset information
During initcalls is ok, but is a rather random place to find the build-id:

  (XEN) Parked 2 CPUs
  (XEN) build-id: 7ff05f78ebc8141000b9feee4370a408bd935dec
  (XEN) Running stub recovery selftests...

Logically, it is version information, so print with the changeset information
in console_init_preirq():

  (XEN) Xen version 4.13-unstable (andrewcoop@andrecoop) (gcc (Debian 4.9.2-10+deb8u2) 4.9.2) debug=y  Fri Apr 12 18:24:52 BST 2019
  (XEN) Latest ChangeSet: Fri Apr 5 14:39:42 2019 git:fc6c7ae-dirty
  (XEN) build-id: 7ff05f78ebc8141000b9feee4370a408bd935dec
  (XEN) PVH start info: (pa 0000ffc0)

Nothing has ever cared about xen_build_init()'s return value, so convert it to
void rather than include errno.h into the !BUILD_ID case of version.h

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-05-21 10:41:47 +01:00
Jan Beulich 76ba8b1428 x86/cpuidle: clean up Cx dumping
Don't log the same global information once per CPU. Don't log the same
information (here: the currently active state) twice. Don't prefix
decimal numbers with zeros (giving the impression they're octal). Use
format specifiers matching the type of the corresponding expressions.
Don't split printk()-s without intervening new-lines.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-21 08:31:47 +02:00
Jan Beulich 685151829e x86/cpuidle: push parked CPUs into deeper sleep states when possible
When the mwait-idle driver isn't used, C-state information becomes
available only in the course of Dom0 starting up. Use the provided data
to allow parked CPUs to sleep in a more energy efficient way, by waking
them briefly (via NMI) once the data has been recorded.

This involves re-arranging how/when the governor's ->enable() hook gets
invoked. The changes there include addition of so far missing error
handling in the respective CPU notifier handlers.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-21 08:31:09 +02:00
Jan Beulich 73cb1383bf x86/idle: re-arrange dead-idle handling
In order to be able to wake parked CPUs from default_dead_idle() (for
them to then enter a different dead-idle routine), the function should
not itself loop. Move the loop into play_dead(), and use play_dead() as
well on the AP boot error path.

Furthermore, not the least considering the comment in play_dead(),
make sure NMI raised (for now this would be a bug elsewhere, but that's
about to change) against a parked or fully offline CPU won't invoke the
actual, full-blown NMI handler.

Note however that this doesn't make #MC any safer for fully offline
CPUs.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-05-21 08:30:23 +02:00