xenbits supports the git protocol now, which is much faster (and
produces less noise in the build log too).
Signed-off-by: Ian Jackson <ian.jackson@eu.citrix.com>
Firstly, these MSRs are always accessible if the CPU supports them --
we should not check for EFER.LMA.
Secondly, we should not use teh cached value of shadow_gs while the
VCPU is running. It can be stale if the guest has executed SWAPGS
(which we cannot trap). Hence always access the underlying host MSR
when emulating guest accesses.
The latter bug was found and a patch proposed by <leonid@3tera.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
This patch disables intercepting CR3 writes when nested paging is
enabled. For applications which cause excessive CR3 accesses, the
patch can increase their performance.
Signed-off-by: Wei Huang <wei.huang2@amd.com>
At least the MSR handling for guests can easily be made shared between
the two vendors; likely a lot of the other code in mce_intel.c could
also be made common. The goal here, however, is to eliminate the
annoying guest-tried-to-modify-msr messages that result from enabling
the MCE code on the Linux side.
Additionally (in order for not having to make the same change twice to
basically identical code) the patch also merges
amd_{fam10,k8}_mcheck_init(), enables the former to also be used for
Fam11 (I'd suppose that Fam12 would also need to go here, but I have
no data to confirm that), and does some minor (mostly coding style for
the code moved around) adjustments.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
install.sh with PYTHON possibly undefined in the environment.
So we make PYTHON=python the sensible default.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
It must exist as otherwise the build will fail since we reference
$(PYTHON) all over the place. Furthermore the fallback of
'/usr/bin/env python' actually runs Python, it doesn't get the path to
it. So that wouldn't work very well.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
Neither Intel P5 nor Winchip are supported by Xen (due to
-march=i686 being passed to the compiler), so there is no point in
having code for handling their (rudimentary) MCA capabilities.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Running Xen on top of KVM exposed an issue that latently also exists
on real hardware: So far, updating any L3 entry resulted in the Xen
owned part of the L2 table referenced by the final L3 one to be re-
initialized. This was not only unnecessary, it actually resulted in
Xen relying on the TLB entry which maps the L2 page that's being
updated not going away intermediately, since as a first step the full
range of Xen owned entries in the L2 were replaced by the respective
ones from the idle page table, and only then the per-domain entries
got re- written to their intended values.
This part of the initialization really is sufficient to be done once,
when the page becomes an L2-with-Xen-entries (PGT_pae_xen_l2) one,
i.e. can be moved to alloc_l2_table(). Only the linear page table
setup has to remain where it always was.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Use vdevfn in xm_pci_attach() for non-zero functions,
the vslot element of dev dictionaries no longer exists.
Signed-off-by: Simon Horman <horms@verge.net.au>
With all of Xen's symbols sitting within a 2Gb range on x86-64, they
can be referred to by the kallsyms-like offset table using 4- instead
of 8-byte slots.
The marker table can use 4-byte slots in all cases, just like the
table entry counts can (though that's only a minor improvement).
If ia64's PERCPU_ADDR got moved down to (KERNEL_START + 2Gb -
PERCPU_PAGE_SIZE), it could also utilize the more compact form.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
After some discussion, here's a second version of the patch I posted a
couple of weeks back to map grant references into HVM guests. As
before, this is done by modifying the P2M map, but this time there's
no new hypercall to do it. Instead, the existing GNTTABOP_map is
overloaded to perform a P2M mapping if called from a shadow mode
translate guest. This matches the IA64 API.
Signed-off-by: Steven Smith <steven.smith@citrix.com>
Acked-by: Tim Deegan <tim.deegan@citrix.com>
CC: Bhaskar Jayaraman <Bhaskar.Jayaraman@lsi.com>
Eliminate the hard-coded, arbitrarily chosen limit of 512 grant table
ops a domain may submit at a time, and instead check for necessary
preemption after each individual element got processed, invoking the
hypercall continuation logic when necessary.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Remove ASSERT(spin_is_locked(&pcidevs_lock)) in
pci_get_pdev_by_domain() to allow caller the flexibility to not hold
the lock if it does not care if the device is hot removed between the
time it got the pdev and the time it is used to get the corresponding
vt-d engine. In the new RHSA use case, we just wanted to get the vt-d
engine of any device passthrough in the domain. Also, rename RHSA
field "domain" to "proximity domain" to avoid overloading the term
"domain" in virtualization context.
Signed-off-by: Allen Kay <allen.m.kay@intel.com>
While unrelated to the previous four patches, I realized that the two
scripts are nearly identical when coding those earlier patches, and
this patch depends on them in order to apply cleanly.
As an extra measure, it also adjusts the (unused) space freed at the
end of the per-CPU area to include all alignment space needed before
the first actual constituent of the .bss section (up to 7 pages on
x86-64).
Signed-off-by: Jan Beulich <jbeulich@novell.com>
These cpu maps get read from all CPUs, so apart from addressing the
square(nr_cpus) growth of these objects, they also get moved into the
previously introduced read-mostly sub-section of the per-CPU section,
in order to not need to waste a full cacheline in order to align (and
properly pad) them, which would be undue overhead on systems with low
NR_CPUS.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Since mixing data that only gets setup once and then (perhaps
frequently) gets read by remote CPUs with data that the local CPU may
modify (again, perhaps frequently) still causes undesirable cache
protocol related bus traffic, separate the former class of objects
from the latter.
These objects converted here are just picked based on their write-once
(or write-very-rarely) properties; perhaps some more adjustments may
be desirable subsequently. The primary users of the new sub-section
will result from the next patch.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
This basically makes the final linking stage identical to x86's (with
the sole difference being that ia64 has the linker generate a map
file, while x86 doesn't), so would generally allow moving the final
linking rule into xen/Rules.mk.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Since the Xen heap pages (which are the only ones mapped at this
point) don't get passed to init_boot_pages(), it has no place to store
the bootmem regions without faulting. Hence, a mapped page must be
passed to that function as the very first thing.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
19818 added the following line to stubdom-dm:
. ./stubdompath.sh
and replaced many paths with variables. However the path to
stubdompath.sh is obviously wrong and stubdompath.sh is nowhere to be
found anyway. For the moment I am dropping . ./stubdompath.sh and
hardcoding the values of the variables.
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Keir Fraser