Commit Graph
45680 Commits
Author SHA1 Message Date
Nicola Vetrini dc8d86e03a xen/memory: make 'ioreq_server_max_frames' static
The function 'ioreq_server_max_frames' can be defined static,
as its only uses are within the same file. This in turn avoids
violating MISRA C:2012 Rule 8.4 because no declaration is present.

No functional change.

Fixes: 9244528955 ("xen/memory: Fix acquire_resource size semantics”)
Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
2023-08-10 15:12:56 +02:00
Jan Beulich 4086857cc1 x86: implement cpuid() in terms of cpuid_count()
Since as a bug workaround (likely inapplicable to any 64-bit CPUs, but
it probably doesn't hurt to keep this) we clear %ecx on input anyway,
we can as well fall back to cpuid_count(). This allows getting rid of
four risky casts and makes things type-safe. The latter aspect requires
two type adjustments elsewhere. While adjusting init_intel_cacheinfo(),
convert three other local variables there as well. For the struct
cpuinfo_x86 change it is relevant to note that no 64-bit CPU comes
without CPUID support, and hence cpuid_level is never set to -1; the
comment there was simply stale.

No functional change intended, yet of course generated code isn't
identical.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2023-08-10 15:11:37 +02:00
Jan Beulich 751235f6d1 move PAGE_ALIGN() to common header
Much like we have PAGE_OFFSET() there already, there's also no reason
for each arch to define identical PAGE_ALIGN().

While there re-pad PAGE_OFFSET() to match the other macros.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Julien Grall <jgrall@amazon.com>
2023-08-10 15:09:25 +02:00
Simone Ballarin 79c18114c7 automation/eclair: update analyzed builds
The xen build for ARM64 now has new configuration options which
require to be defined: this patch defines them.

In both configuration files some no longer true comments have been removed.

Signed-off-by: Simone Ballarin <simone.ballarin@bugseng.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
2023-08-09 17:06:33 -07:00
Simone Ballarin 257a6e763a automation/eclair: add ECL deviations
This patch adds some deviations for the following guidelines:
Rule 2.1, Rule 5.3 and Rule 8.2.

Signed-off-by: Simone Ballarin <simone.ballarin@bugseng.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
2023-08-09 17:06:32 -07:00
Simone Ballarin f3ab12d216 automation/eclair: update clean guidelines
This patch splits the former list in two separate selectors
clean_guidelines_common and additional_clean_guidelines.

clean_guidelines_common contains the guidelines that are clean
in both the analyzed builds, instead additional_clean_guidelines
is popolated depending on the current one.

The following clean guidelines have been added:
- MC3R1.R1.1;
- MC3R1.R1.3;
- MC3R1.R3.1;
- MC3R1.R4.1;
- MC3R1.R17.4;
- MC3R1.R22.6;
- MC3R1.D4.3 (just x86_64);
- MC3R1.R5.3 (just arm64);
- MC3R1.R7.2 (just arm64);
- MC3R1.R8.6 (just arm64);
- MC3R1.R9.3 (just arm64).

Signed-off-by: Simone Ballarin <simone.ballarin@bugseng.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
2023-08-09 17:06:08 -07:00
Nicola Vetrini 236fc9fdf9 xen/delay: address MISRA C:2012 Rule 5.3
The variable 'msec' declared in the macro shadows the local
variable in 'ehci_dbgp_bios_handoff', but to prevent any
future clashes with other functions the macro is converted to
a static inline function.

No functional change.

Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Julien Grall <jgrall@amazon.com>
2023-08-09 15:59:40 +02:00
Jan Beulich f70e11db83 move max_page and total_pages to common code
Common code references both, so the variables shouldn't need declaring
and defining by every arch. While moving the definitions, add
__read_mostly (__ro_after_init would only be appropriate when
!mem_hotplug).

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Julien Grall <jgrall@amazon.com>
2023-08-09 15:58:37 +02:00
Jan Beulich e48acb2afe common: asm/desc.h is an x86-only header
From briefly going over 9062553a0d it looks like the #include in what
was ac_timer.c was added there for no reason. It's unneeded now in any
event, and it is the sole reason for Arm to have that dummy header.
Purge that, thus avoiding PPC (and later RISC-V) to also gain one.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Julien Grall <jgrall@amazon.com>
2023-08-09 15:57:28 +02:00
Jan Beulich aea61dbb8e common: __u8 is history
With the last uses gone, move the type to linux-compat.h.

No functional change intended.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2023-08-09 15:56:44 +02:00
Jan Beulich 75e84d4772 common: move Linux-inherited fixed width type decls to common header
Have these in one place, for all architectures to use. Also use the C99
types as the "original" ones, and derive the Linux compatible ones
(which we're trying to phase out). For __s<N>, seeing that no uses exist
anymore, move them to a new Linux compatibility header (as an act of
precaution - as said, we don't have any uses of these types right now).

In some Flask sources inclusion of asm/byteorder.h needs moving later.

No functional change intended.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Julien Grall <jgrall@amazon.com>
2023-08-09 15:54:45 +02:00
Michal Orzel 15601eed05 xen/arm64: head: Introduce a helper to flush local TLBs
Instead of repeating the same sequence of instructions to flush the TLBs
in various places, introduce a macro flush_xen_tlb_local and make use of
it. This is similar to what was done for arm32 by the commit:
dea9dddece

This is also making the flush sequence in enable_mmu more clear and
consistent.

Signed-off-by: Michal Orzel <michal.orzel@amd.com>
Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
Reviewed-by: Julien Grall <jgrall@amazon.com>
2023-08-09 12:00:12 +01:00
Juergen Gross a8a7c33e7d tools/xl: reject bootloader=pygrub in case pygrub is disabled
In case Xen has been configured with "--disable-pygrub", don't accept
the domain config option "bootloader=pygrub".

Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Acked-by: Anthony PERARD <anthony.perard@citrix.com>
2023-08-09 09:05:55 +02:00
Juergen Gross df8852543d tools: add configure option for libfsimage
The only in-tree user of libfsimage is pygrub. Now that it is possible
to disable the build of pygrub, the same should be possible for
libfsimage.

Add an option for controlling the build of libfsimage. The default is
on if pygrub is being built, and off if it isn't. Without pygrub the
build of libfsimage can be enabled via --enable-libfsimage.

Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Anthony PERARD <anthony.perard@citrix.com>
2023-08-09 09:05:40 +02:00
Juergen Gross c9a899f7f4 tools: add configure option for disabling pygrub
Add a "--disable-pygrub" option for being able to disable the build
and installation of pygrub.

There are two main reasons to do so:

- A main reason to use pygrub is to allow a PV guest to choose its
  bitness (32- or 64-bit). Pygrub allows that by looking into the boot
  image and to start the guest in the correct mode depending on the
  kernel selected. With 32-bit PV guests being deprecated and the
  possibility to even build a hypervisor without 32-bit PV support,
  this use case is gone for at least some configurations.

- Pygrub is running in dom0 with root privileges. As it is operating
  on guest controlled data (the boot image) and taking decisions based
  on this data, there is a higher security risk. Not being possible
  to use pygrub is thus a step towards a reduction of attack surface.

Default is still to build and install pygrub.

Signed-off-by: Juergen Gross <jgross@suse.com>
Acked-by: Anthony PERARD <anthony.perard@citrix.com>
2023-08-09 09:05:23 +02:00
Shawn Anastasio f974004ccb ns16550: Guard accesses to vuart field by CONFIG_ARM
When CONFIG_ARM is defined, a `vuart` field is added to struct ns16550,
but accesses to this field in ns16550_uart_dt_init weren't correctly
guarded. Fix build on !ARM platforms that define CONFIG_HAS_DEVICE_TREE
by correctly guarding access to the vuart field in this function.

Signed-off-by: Shawn Anastasio <sanastasio@raptorengineering.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2023-08-09 09:04:24 +02:00
Jan Beulich 82f7f7be46 libxenstat/Linux: pass nul-terminated string to strpbrk()
While what "tmp" points to has been cleared at the end of the first
iteration of parseNetDevLine()'s main loop, this is too late for the
first iteration's invocation of strpbrk() (copying the interface name).
Properly nul-terminate the string at population time instead, removing
the late clearing.

While there also eliminate a confusing (because of being wrong) comment:
A regex parsing error would be handled one further scope outwards. Here
we're dealing with field 1 vs any of the later fields.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Juergen Gross <jgross@suse.com>
Acked-by: Anthony PERARD <anthony.perard@citrix.com>
2023-08-09 09:03:51 +02:00
Michal Orzel 76c243b1bc automation: Fix missing smoke.serial in artifacts of qemu arm32 jobs
It was observed that smoke.serial file (used to store boot logs) is
missing in artifacts of qemu based arm32 jobs. This is because the
artifacts:paths listing smoke.serial specifies paths relative to the
project directory but the qemu-smoke-dom0{less}-arm32.sh scripts create
this file under binaries/. Fix it so that smoke.serial gets created in
project directory just like for every other test job.

Signed-off-by: Michal Orzel <michal.orzel@amd.com>
Reviewed-by: Luca Fancellu <luca.fancellu@arm.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
2023-08-08 18:18:23 -07:00
Nicola Vetrini a9de4b62f4 x86/setup: address MISRA C:2012 Rule 5.3 and 8.3
The parameters in the function declaration 'construct_dom0' violate
Rule 8.3:
"All declarations of an object or function shall use the same names
and type qualifiers", but also cause shadowing inside the declaration
scope with the variable "static struct file __initdata kernel;" in
'xen/common/efi/boot.c'. Renaming the parameters in the declaration
resolves both issues

The local variable 'mask' is removed because it shadows the homonymous
variable defined in an outer scope. There's no change to the semantics since
the last use of this variable is in the scope touched by this commit.

No functional changes.

Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-08 18:17:51 -07:00
Nicola Vetrini 752fd032bf x86: refactor macros in 'xen-mca.h'
The macros defined 'xen/include/public/arch-x86/xen-mca.h' are revised
to address the following concerns:
- needless underscore prefixes for parameter names;
- the variable 'i' in function 'mce_action' that is shadowed
  by the local variable in the macro.

Therefore, the refactoring aims to resolve present shadowing
issues, which violate MISRA C:2012 Rule 5.3, and lessen the
probability of future ones with some renames.

No functional change.

Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2023-08-08 18:17:19 -07:00
Nicola Vetrini 7ee9556518 x86/xstate: address MISRA C:2012 Rule 5.3
Rename the local variables s/xsave/xstate/ to avoid clashing with
function 'xsave' declared in 'xen/arch/x86/include/asm/xstate.h'.

No functional changes.

Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
[stefano: defined/declared in commit message]
Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-08 18:16:52 -07:00
Nicola Vetrini f53d0136ae x86/include: address MISRA C:2012 Rule 5.3.
Variable 'mpc_default_type' in 'xen/arch/x86/include/asm/mpspec.h'
has no uses and causes shadowing with function parameter names
in 'mpparse.c'. Therefore, it is removed.

No functional changes.

Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2023-08-08 18:15:46 -07:00
Andrew Cooper 56d690efd3 x86/spec-ctrl: Mitigate Gather Data Sampling
This is part of XSA-435 / CVE-2022-40982

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2023-08-08 15:19:49 +01:00
Andrew Cooper 9f585f59d9 x86/spec-ctrl: Enumerations for Gather Data Sampling
GDS_CTRL is introduced by the August 2023 microcode.  GDS_NO is for current
and future processors not susceptible to GDS.

This is part of XSA-435 / CVE-2022-40982

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-08 15:19:49 +01:00
Andrew Cooper 2dd06b4ea1 x86/cpu-policy: Hide CLWB by default on SKX/CLX/CPX
The August 2023 microcode for GDS has an impact on the CLWB instruction.  See
code comments for full details.

This is part of XSA-435 / CVE-2022-40982

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2023-08-08 15:19:49 +01:00
Andrew Cooper 220c06e6fe x86/spec-ctrl: Mitigate Speculative Return Stack Overflow
On native, synthesise the SRSO bits by probing various hardware properties as
given by AMD.

Extend the IBPB-on-entry mitigations to Zen3/4 CPUs.  There is a microcode
prerequisite to make this an effective mitigation.

This is part of XSA-434 / CVE-2023-20569

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
2023-08-08 15:19:49 +01:00
Andrew Cooper 2280b0ee2a x86/spec-ctrl: Enumerations for Speculative Return Stack Overflow
AMD have specified new CPUID bits relating to SRSO.

 * SRSO_NO indicates that hardware is no longer vulnerable to SRSO.
 * IBPB_BRTYPE indicates that IBPB flushes branch type information too.
 * SBPB indicates support for a relaxed form of IBPB that does not flush
   branch type information.

Current CPUs (Zen4 and older) are not expected to enumerate these bits.
Native software is expected to synthesise them for guests using model and
microcode revision checks.

Two are just status bits, and SBPB is trivial to support for guests by
tweaking the reserved bit calculation in guest_wrmsr() and feature
dependencies.  Expose all by default to guests, so they start showing up when
Xen synthesises them.

While adding feature dependenies for IBPB, fix up an overlooked issue from
XSA-422.  It's inappropriate to advertise that IBPB flushes RET predictions if
IBPB is unavailable itself.

This is part of XSA-434 / CVE-2023-20569

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
2023-08-08 15:19:49 +01:00
Andrew Cooper 292f68fb77 x86/spec-ctrl: Rework ibpb_calculations()
... in order to make the SRSO mitigations easier to integrate.

 * Check for AMD/Hygon CPUs directly, rather than assuming based on IBPB.
   In particular, Xen supports synthesising the IBPB bit to guests on Intel to
   allow IBPB while dissuading the use of (legacy) IBRS.
 * Collect def_ibpb_entry rather than opencoding the BTC_NO calculation for
   both opt_ibpb_entry_{pv,hvm}.

No functional change.

This is part of XSA-434 / CVE-2023-20569

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
2023-08-08 15:19:49 +01:00
Andrew Cooper 46c5ef609b subdom: Fix -Werror=address failure in tmp_emulator
The opensuse-tumbleweed build jobs currently fail with:

  /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.c: In function 'rsa_private':
  /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.c:56:7: error: the comparison will always evaluate as 'true' for the address of 'p' will never be NULL [-Werror=address]
     56 |   if (!key->p || !key->q || !key->u) {
        |       ^
  In file included from /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.c:17:
  /builds/xen-project/xen/stubdom/tpm_emulator-x86_64/crypto/rsa.h:28:12: note: 'p' declared here
     28 |   tpm_bn_t p;
        |            ^

This is because all tpm_bn_t's are 1-element arrays (of either a GMP or
OpenSSL BIGNUM flavour).

Adjust it to compile.  No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jason Andryuk <jandryuk@gmail.com>
2023-08-08 12:24:17 +01:00
Luca Fancellu bd3ddaf6ee xen/arm: Add Cortex-A77 erratum 1508412 handling
Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence of a
store-exclusive or read of PAR_EL1 and a load with device or non-cacheable
memory attributes.
A workaround is available, but it depends on a firmware counterpart.

The proposed workaround from the errata document is to modify the software
running at EL1 and above to include a DMB SY before and after accessing
PAR_EL1.

In conjunction to the above, the firmware needs to use a specific write
sequence to several IMPLEMENTATION DEFINED registers to have the hardware
insert a DMB SY after all load-exclusive and store-exclusive instructions.

Apply the workaround to Xen where PAR_EL1 is read, implementing an helper
function to do that.
Since Xen can be interrupted by irqs in any moment, add a barrier on
entry/exit when we are running on the affected cores.

A guest without the workaround can deadlock the system, so warn the users
of Xen with the above type of cores to use only trusted guests, by
printing a message on Xen startup.

This is XSA-436 / CVE-2023-34320.

Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
Reviewed-by: Julien Grall <jgrall@amazon.com>
2023-08-08 08:50:17 +01:00
Federico Serafini cb827e7a19 x86/cpu: Address a violation of MISRA C:2012 Rule 8.3
A missing change to the type in 'opt_arat' declaration introduced a new
violation of MISRA C:2012 Rule 8.3 ("All declarations of an object or
function shall use the same names and type qualifiers").
Change the type to restore the consistency between all declarations of
the object and drop a further usage of 'bool_t'.

Fixes: 202a341f ("x86: Address violations of MISRA C:2012 by replacing bool_t uses")
Reported-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-08 09:45:46 +02:00
Anthony PERARD ad89640ad7 libxl: Use XEN_LIB_DIR to store bootloader from pygrub
In osstest, the jobs using pygrub on arm64 on the branch linux-linus
started to fails with:
    [Errno 28] No space left on device
    Error writing temporary copy of ramdisk

This is because /var/run is small when dom0 has only 512MB to work
with, /var/run is only 40MB. The size of both kernel and ramdisk on
this jobs is now about 42MB, so not enough space in /var/run.

So, to avoid writing a big binary in ramfs, we will use /var/lib
instead, like we already do when saving the device model state on
migration.

Reported-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Reviewed-by: Jason Andryuk <jandryuk@gmail.com>
2023-08-08 09:45:20 +02:00
Shawn Anastasio 83ea97ecc0 xen/ppc: Implement early serial console on PowerNV
Implement the OPAL firmware calls required to write to the serial
console on PowerNV systems. Unlike pseries/Open Firmware, the OPAL
firmware interface can be used past early boot and as such the relevant
functions are not marked as __init.

Signed-off-by: Shawn Anastasio <sanastasio@raptorengineering.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-08 09:44:46 +02:00
Shawn Anastasio 6fc15ec32b xen/ppc: Parse device tree for OPAL node on PowerNV
Communication with firmware boot services on PowerNV requires parsing
the fdt blob passed by the bootloader in order to obtain the firmware
entrypoint. Use Xen's libfdt to do this and store the information
required for firmware calls, to be implemented in a future patch.

The full xen/common build doesn't yet work, but libfdt and its xen/lib
dependency can be made to build by defining a few stub headers.

Signed-off-by: Shawn Anastasio <sanastasio@raptorengineering.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-08 09:41:03 +02:00
Shawn Anastasio c99f57a783 xen/ppc: Add OPAL API definition header file
OPAL (OpenPower Abstraction Layer) is the interface exposed by firmware
on PowerNV (bare metal) systems. Import Linux's header definining the
API and related information.

From Linux commit 5321d1b1afb9a17302c6cec79f0cbf823eb0d3fc

Signed-off-by: Shawn Anastasio <sanastasio@raptorengineering.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-08 09:39:37 +02:00
Gianluca Luparini d3be806dae xen/x86: address violations of MISRA C:2012 Rule 7.3
The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline
states:
"The lowercase character 'l' shall not be used in a literal suffix".

Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity.
If the "u" suffix is used near "L", use the "U" suffix instead, for consistency.

The changes in this patch are mechanical.

Signed-off-by: Gianluca Luparini <gianluca.luparini@bugseng.com>
Signed-off-by: Simone Ballarin <simone.ballarin@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-07 13:20:18 -07:00
Gianluca Luparini 84df4fd56d x86/mm: address violations of MISRA C:2012 Rule 7.3
The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline
states:
"The lowercase character 'l' shall not be used in a literal suffix".

Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity.
If the "u" suffix is used near "L", use the "U" suffix instead, for consistency.

The changes in this patch are mechanical.

Signed-off-by: Gianluca Luparini <gianluca.luparini@bugseng.com>
Signed-off-by: Simone Ballarin <simone.ballarin@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-07 13:20:05 -07:00
Gianluca Luparini 2cb7d006b5 x86/IOMMU: address violations of MISRA C:2012 Rule 7.3
The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline
states:
"The lowercase character 'l' shall not be used in a literal suffix".

Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity.
If the "u" suffix is used near "L", use the "U" suffix instead, for consistency.

The changes in this patch are mechanical.

Signed-off-by: Gianluca	Luparini <gianluca.luparini@bugseng.com>
Signed-off-by: Simone Ballarin <simone.ballarin@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-07 13:19:51 -07:00
Gianluca Luparini 854c63f82c x86/svm: address violations of MISRA C:2012 Rule 7.3
The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline
states:
"The lowercase character 'l' shall not be used in a literal suffix".

Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity.
If the "u" suffix is used near "L", use the "U" suffix instead, for consistency.

The changes in this patch are mechanical.

Signed-off-by: Gianluca	Luparini <gianluca.luparini@bugseng.com>
Signed-off-by: Simone Ballarin <simone.ballarin@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-07 13:19:20 -07:00
Gianluca Luparini c44cf8f584 AMD/IOMMU: address violations of MISRA C:2012 Rule 7.3
The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline
states:
"The lowercase character 'l' shall not be used in a literal suffix".

Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity.
If the "u" suffix is used near "L", use the "U" suffix instead, for consistency.

The changes in this patch are mechanical.

Signed-off-by: Gianluca Luparini <gianluca.luparini@bugseng.com>
Signed-off-by: Simone Ballarin <simone.ballarin@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-07 13:19:06 -07:00
Michal Orzel 7d5ef63f08 automation: Advertise that ECLAIR jobs do not need prerequisites
While not required today (ECLAIR jobs come first), add "needs: []" for
future-proofing and consistency with other jobs in the pipeline.

Signed-off-by: Michal Orzel <michal.orzel@amd.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2023-08-07 13:18:19 -07:00
Federico Serafini 5e7a0614a4 x86/mce: Address violations of MISRA C:2012 Rules 8.2 and 8.3
Give a name to unnamed parameters to address violations of
MISRA C:2012 Rule 8.2 ("Function types shall be in prototype form with
named parameters").
Keep consistency between parameter types used in function
declarations and the ones used in the corresponding function
definitions, thus addressing violations of MISRA C:2012 Rule 8.3
("All declarations of an object or function shall use the same names
and type qualifiers").

No functional change.

Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-07 13:18:04 -07:00
Nicola Vetrini 6456661cd0 x86/mtrr: address MISRA C:2012 Rule 5.3
Rename variables to avoid shadowing and thus address
MISRA C:2012 Rule 5.3:
"An identifier declared in an inner scope shall not hide an
identifier declared in an outer scope".

The shadowing happens between the global variable 'mtrr_state' declared
in 'xen/arch/x86/include/asm/mtrr.h' and local variable names.  The
latter are renamed to 'm', which is used elsewhere in
'xen/arch/x86/hvm/mtrr.c' for the same purpose.

No functional changes.

Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
[stefano: improve commit description]
Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-07 13:16:59 -07:00
Nicola Vetrini 48627540a1 x86/mce: address MISRA C:2012 Rule 5.3
Suitable mechanical renames are made to avoid shadowing
the function identifier 'wait' declared in 'xen/include/xen/wait.h',
thus addressing violations of MISRA C:2012 Rule 5.3:
"An identifier declared in an inner scope shall not hide an
identifier declared in an outer scope"

The parameter name 'bar' is added as well to comply with MISRA C:2012
Rules 8.2 and 8.3.

Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-07 13:14:52 -07:00
Federico Serafini 6759b42fcb xen: change parameter name in monitor_domctl() declaration
Change parameter name in monitor_domctl() declaration for
consistency with the corresponding definition.
This addresses a violation of MISRA C:2012 Rule 8.3: "All declarations
of an object or function shall use the same names and type qualifiers".

No functional changes.

Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Acked-by: Tamas K Lengyel <tamas@tklengyel.com>
2023-08-07 13:14:01 -07:00
Andrew Cooper 65f0d6fc80 x86: Drop opt_pku entirely
This option is particularly dubious as Xen does not use Protection Keys, owing
to the sharing of pagetables with PV guests.  All this option does is hide PKU
by default from HVM guests, and is therefore redundant with the more generic
cpuid=no-pku.

The variable ought to be in __initdata given it's single user, but deleting it
entirely looks to be a better course of action.

Visibility of PKU to guests should be handled via its vm.cfg file.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Henry Wang <Henry.Wang@arm.com>
2023-08-07 15:30:18 +01:00
Alejandro Vallejo 767d1a2cfd arm/mm: Document the differences between arm32 and arm64 directmaps
arm32 merely covers the XENHEAP, whereas arm64 currently covers anything in
the frame table. These comments highlight why arm32 doesn't need to account for PDX
compression in its __va() implementation while arm64 does.

Signed-off-by: Alejandro Vallejo <alejandro.vallejo@cloud.com>
Reviewed-by: Julien Grall <jgrall@amazon.com>
2023-08-07 14:45:18 +01:00
Nicola Vetrini d63ea6c46b libelf: address MISRA C:2012 Rule 5.3
The types u{8,16,32,64} defined in 'xen/arch/x86/include/asm/types.h'
shadow the variables in the modified function, hence violating Rule 5.3.
Therefore, the rename takes care of the shadowing.

No functional changes.

Signed-off-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2023-08-07 11:26:43 +02:00
Federico Serafini 202a341fd4 x86: Address violations of MISRA C:2012 by replacing bool_t uses
Give a name to unnamed parameters to address violations of
MISRA C:2012 Rule 8.2 ("Function types shall be in prototype form with
named parameters").
Keep consistency between object and function declarations thus
addressing violations of MISRA C:2012 Rule 8.3 ("All declarations of an
object or function shall use the same names and type qualifiers").
Replace the occurrences of bool_t with bool.

No functional change.

Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-08-07 11:24:28 +02:00
Gianluca Luparini 0c8d77e117 xen/include: address violations of MISRA C:2012 Rule 7.3
From: Gianluca Luparini <gianluca.luparini@bugseng.com>

The xen sources contain violations of MISRA C:2012 Rule 7.3 whose headline
states:
"The lowercase character 'l' shall not be used in a literal suffix".

Use the "L" suffix instead of the "l" suffix, to avoid potential ambiguity.
If the "u" suffix is used near "L", use the "U" suffix instead, for consistency.

The changes in this patch are mechanical.

Signed-off-by: Gianluca Luparini <gianluca.luparini@bugseng.com>
Signed-off-by: Simone Ballarin <simone.ballarin@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2023-08-07 11:23:54 +02:00